A GA with heuristic based decoder for floorplanning with flexible IC modules

被引:0
|
作者
Hwee, GB [1 ]
Hiot, LM [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A genetic algorithm with heuristic based layout decoder (GAHD) is implemented for IC floorplanning. The basic idea is to make use of a GA to search for an optimal arrangement of circuit modules on a given layout area. To achieve a GA that is efficient in floorplanning, we employ a technique to systematically determine suitable weighting coefficients of the search objectives in deriving a suitable objective function. Furthermore, a heuristic based layout decoder was designed for determining the optimal aspect ratio and orientation of each flexible module. Our results show improvement over other reported floorplanning algorithms based on simulations of the AMI33 benchmark problem.
引用
收藏
页码:451 / 454
页数:4
相关论文
共 50 条
  • [1] A GA with heuristic-based decoder for IC floorplanning
    Gwee, BH
    Lim, MH
    INTEGRATION-THE VLSI JOURNAL, 1999, 28 (02) : 157 - 172
  • [2] Floorplanning Optimization Based on Modules Current Density
    Hang, Cheng
    Xia, Yin-shui
    Chu, Zhu-fei
    Du, Shi-min
    INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER SCIENCE AND ENGINEERING (ACSE 2014), 2014, : 442 - 447
  • [3] A Flexible Fixed-outline Floorplanning Methodology for Mixed-size Modules
    Chan, Kai-Chung
    Hsu, Chao-Jam
    Lin, Jia-Ming
    2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2013, : 435 - 440
  • [4] A Flexible Decoder IC for WiMAX QC-LDPC Codes
    Kuo, Tzu-Chieh
    Willson, Alan N., Jr.
    PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2008, : 527 - 530
  • [5] A Flexible NISC-Based LDPC Decoder
    Le Gal, Bertrand
    Jego, Christophe
    Leroux, Camille
    IEEE TRANSACTIONS ON SIGNAL PROCESSING, 2014, 62 (10) : 2469 - 2479
  • [6] ALOE-based flexible LDPC decoder
    Gomez, Ismael
    Camatel, Massimo
    Bracke, Jordi
    Marojevic, Vuk
    Gelonch, Antoni
    Vacca, Fabrizio
    Masera, Guido
    13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS, 2010, : 314 - 320
  • [7] Flexible graphplan based on heuristic searching
    Han, Yi
    Gu, Wen-Xiang
    Li, Yang
    Yin, Ming-Hao
    Bo, Jing-Zhang
    PROCEEDINGS OF 2006 INTERNATIONAL CONFERENCE ON MACHINE LEARNING AND CYBERNETICS, VOLS 1-7, 2006, : 160 - +
  • [8] Algorithm Research of Flexible Graphplan Based on Heuristic
    Li, Yang
    Sun, Yan
    Han, Chengshan
    Wang, Xiaodong
    Xu, Shuyan
    PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE FOR YOUNG COMPUTER SCIENTISTS, VOLS 1-5, 2008, : 48 - 53
  • [9] Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC
    Lin, Jai-Ming
    Chang, Wei-Yi
    Hsieh, Hao-Yuan
    Shyu, Ya-Ting
    Chang, Yeong-Jar
    Lu, Juin-Ming
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 29 (09) : 1652 - 1664
  • [10] A scheme of GA acceleration based on domain generic IC
    Mo Zhang
    Yunzhou Zhang
    Gang Xie
    Gang Zhang
    Cluster Computing, 2019, 22 : 9133 - 9144