CSP compatibility in the SMT assembly process

被引：0
|
作者：
Chen, LA [1 ]
Sterian, I
Smith, B
Kirkpatrick, D
机构：
[1] Celestica Int, Toronto, ON, Canada
[2] Celest Int, Stoke On Trent, Staffs, England
来源：
SOLDERING & SURFACE MOUNT TECHNOLOGY | 1999年 / 11卷 / 02期
关键词：
assembly; ball grid array; chipscale packaging; microvias; surface mount; technology;
D O I：
10.1108/09540919910265659
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
To achieve integration of chip scale package (CSP) devices into main stream surface mount technology (SMT) assembly, various experiments have been required. In process development, experiences learned from flip chip attach and ball grid array (BGA) assembly were utilized. Key process parameters for CSP assembly were defined and some of those key factors were optimized. They will be presented in this paper. Some observations during prototype build have been documented for correlation with reliability results in the future. The requirements for further CSP assembly studies will also be addressed in this paper.
引用
收藏
页码：25 / 29
页数：5
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