A novel trimming circuit based on D type flip-flop

被引:0
|
作者
Luo, Shi-Lin [1 ]
Li, Ze-Hong [1 ]
Zhao, Nian [1 ]
Xiong, Han-Feng [1 ]
Zhang, Cheng-Fa [1 ]
机构
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Oevic, Chengdu 610054, Sichuan, Peoples R China
关键词
Trimming; current fuse; self-feeedback; ultra-low power consumption;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A design of trimming circuit which based on D type flip-flop is proposed in this paper. The circuit generates trimming code by using a code generating module, a control signals generating module, a code saving and output module.ft uses the self -feedback signal to close the aforementioned module while saving the required trimming code to achieve ltra-low power consumption. Based on the 0.35 mu m BCD process platform, the proposed circuit is used for a current ence circuit. The results show that the current varies 1.011uA to 1.04911A at -50 similar to 175 degrees C for the full process corner (243 process corners).The whole power consumption of the circuit is 1 mu A.
引用
收藏
页码:944 / 946
页数:3
相关论文
共 50 条
  • [1] A Novel ESD Power Clamp Circuit with TSPCL D Flip-flop
    Tang, Baojun
    Liu, Hongxia
    [J]. 2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009), 2009, : 111 - +
  • [2] TERNARY FLIP-FLOP CIRCUIT
    RATH, SS
    [J]. INTERNATIONAL JOURNAL OF ELECTRONICS, 1975, 38 (01) : 41 - 47
  • [3] A SIMPLE FLIP-FLOP CIRCUIT
    HENDRY, DP
    PERRY, AM
    [J]. JOURNAL OF THE EXPERIMENTAL ANALYSIS OF BEHAVIOR, 1962, 5 (04) : 442 - &
  • [4] Switched flip-flop based preprocessing circuit for ISFETs
    Kollár, M
    [J]. SENSORS, 2005, 5 (03): : 118 - 125
  • [5] INTEGRATED JK FLIP-FLOP CIRCUIT
    INABE, Y
    KATAOKA, K
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (04) : 403 - 406
  • [6] CONTROLLED STABILITY OF FLIP-FLOP CIRCUIT
    STUTZ, TOJ
    MULLER, A
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1972, SC 7 (02) : 211 - &
  • [7] Single Phase Clock Based Radiation Tolerant D Flip-flop Circuit
    Jain, A.
    Veggetti, A.
    Crippa, D.
    Benfante, A.
    Gerardin, S.
    Bagatin, M.
    [J]. 2020 26TH IEEE INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2020), 2020,
  • [8] A Novel Flip-Flop Circuit for Sub-threshold Application
    Peng Panfeng
    Shi Weiwei
    Xie Gang
    [J]. CONFERENCE PROCEEDINGS OF 2017 INTERNATIONAL CONFERENCE ON CIRCUITS, DEVICES AND SYSTEMS (ICCDS), 2017, : 63 - 67
  • [9] TOGGLE AN UNTOGGLABLE D-TYPE FLIP-FLOP
    KARTALOPOULOS, SV
    [J]. ELECTRONIC ENGINEERING, 1977, 49 (600): : 37 - 37
  • [10] Upset of a flip-flop based counting circuit by EM transients
    Kashyap, S
    Gardner, CL
    Walsh, JA
    [J]. 2001 IEEE EMC INTERNATIONAL SYMPOSIUM, VOLS 1 AND 2, 2001, : 233 - 238