TDDB Monitoring and Compensation Circuit Design for Deeply Scaled CMOS Technology

被引:3
|
作者
Nan, Haiqing [1 ]
Choi, Kyuwon [1 ]
机构
[1] IIT, Dept Elect & Comp Engn, Chicago, IL 60616 USA
关键词
Circuit reliability; monitoring circuit; time-dependent dielectric breakdown (TDDB); TDDB compensation; triple modular redundancy (TMR); GATE-OXIDE BREAKDOWN; IMPACT; RELIABILITY; DEVICES;
D O I
10.1109/TDMR.2011.2167624
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a time-dependent dielectric breakdown (TDDB) compensation method with two TDDB monitoring circuits for reliable designs is proposed in 32-nm CMOS technology. To the best of our knowledge, there is no TDDB compensation method or TDDB monitoring circuits proposed before. The proposed TDDB monitoring circuits are referred to as soft breakdown (SBD) monitoring circuit and hard breakdown (HBD) monitoring circuit, which generate a fixed output pattern when severe SBD or HBD occurs. Based on the output of the monitoring circuits, the TDDB compensation method is proposed to completely overcome severe performance degradation and functionality failure due to SBD and HBD. The effectiveness and design costs of the proposed designs are evaluated using ISCAS'85 benchmark circuits.
引用
收藏
页码:18 / 25
页数:8
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