Progress and Prospects of Spin Transfer Torque Random Access Memory

被引：28

作者：

Chen, E. ^{[1
]}

Apalkov, D. ^{[1
]}

Driskill-Smith, A. ^{[1
]}

Khvalkovskiy, A. ^{[1
]}

Lottis, D. ^{[1
]}

Moon, K. ^{[1
]}

Nikitin, V. ^{[1
]}

Ong, A. ^{[1
]}

Tang, X. ^{[1
]}

Watts, S. ^{[1
]}

Kawakami, R. ^{[1
]}

Krounbi, M. ^{[1
]}

Wolf, S. A. ^{[2
]}

Poon, S. J. ^{[2
]}

Lu, J. W. ^{[2
]}

Ghosh, A. W. ^{[2
]}

Stan, M. ^{[2
]}

Butler, W. ^{[3
]}

Mewes, Tim ^{[3
]}

Gupta, S. ^{[3
]}

Mewes, C. K. A. ^{[3
]}

Visscher, P. B. ^{[3
]}

Lukaszew, R. A. ^{[4
]}

机构：

[1] Grandis, Milpitas, CA 95035 USA

[2] Univ Virginia, Charlottesville, VA 22904 USA

[3] Univ Alabama, Tuscaloosa, AL 35487 USA

[4] Coll William & Mary, Williamsburg, VA 23187 USA

来源：

IEEE TRANSACTIONS ON MAGNETICS | 2012年 / 48卷 / 11期

关键词：

Magnetic tunnel junction (MTJ); nonvolatile memory (NVM); spin transfer torque (STT); STT-MRAM; STT-RAM;

D O I：

10.1109/TMAG.2012.2198451

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We report our progress on material improvement, device design, wafer processing, integration with CMOS, and testing of STT-RAM memory chips at 54 nm node with cell sizes of 14 and 28 F-2 (F = 54 nm). A dual tunnel barrier MTJ structure was found to have lower and more symmetric median spin transfer torque writing switching currents, and much tighter parallel to antiparallel switching current distribution. In-plane MTJ devices write endurance data, read and write soft error rates data and simulation fits, and solutions to the long write error rate tail at fast write speeds are discussed.

引用

页码：3025 / 3030

页数：6

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