Multi-protocol embedded PCSIP in a FPGA-SOC

被引：0

作者：

Venkata, R ^{[1
]}

Chan, VS ^{[1
]}

Ton, B ^{[1
]}

Lee, C ^{[1
]}

Ngo, H ^{[1
]}

Kabani, M ^{[1
]}

Nguyen, T ^{[1
]}

Zaliznyak, A ^{[1
]}

Xue, N ^{[1
]}

Shen, S ^{[1
]}

Zheng, M ^{[1
]}

Lai, M ^{[1
]}

Park, S ^{[1
]}

Chan, LN ^{[1
]}

Vijayaraghavan, D ^{[1
]}

Lam, J ^{[1
]}

Patel, R ^{[1
]}

机构：

[1] Altera Corp, San Jose, CA 95134 USA

来源：

CICC: PROCEEDINGS OF THE IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2005年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Several strategies that were employed for developing next-generation embedded Hard IP are reviewed. Mixed signal Hard IP developed for a multi-protocol serial interface physical layer at 0.622Gbps to 3.125Gbps was redeployed for 0.622Gbps to 6.375Gbps data rates. Ensuring quality meant adopting a strongly modular approach to design and verification. The configuration space of the Hard IP had to be bounded intelligently. Major architectural enhancements were necessary instead of a simple performance upgrade of the previous Hard IP. Verification complexity mandated design and verification re-use. Emulation and vendor soft IF interoperability testing was another strategy employed for first silicon success.

引用

下载

页码：783 / 786

页数：4

共 50 条

[21] Using FPGA-SoC Interface for Low Cost IoT Based Image Processing
Dhote, Shivank
Charjan, Pranav
Phansekar, Aditya
Hegde, Aniket
Joshi, Sangeeta
Joshi, Jonathan
2016 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI), 2016, : 1963 - 1968
[22] Multi-protocol voice codec
Nie, Yousan
Liu, Qianhong
Zhou, Shenke
Song, Guowen
Xue, Xiangyang
Jisuanji Gongcheng/Computer Engineering, 1999, 25 (10): : 69 - 71
[23] Implementation of Multi-Protocol, Data Acquisition With High Speed USB Interface, Using FPGA
Thanee, S.
Somkuarnpanit, S.
Khuntaweetep, S.
INTERNATIONAL MULTICONFERENCE OF ENGINEERS AND COMPUTER SCIENTISTS (IMECS 2010), VOLS I-III, 2010, : 318 - +
[24] FPGA-SoC implementation of YOLOv4 for flying-object detection
Nguyen, Dai-Duong
Nguyen, Dang-Tuan
Le, Minh-Thuy
Nguyen, Quoc-Cuong
JOURNAL OF REAL-TIME IMAGE PROCESSING, 2024, 21 (03)
[25] Unsupervised image thresholding: hardware architecture and its usage for FPGA-SoC platform
Pandey, Jai Gopal
Karmakar, Abhijit
INTERNATIONAL JOURNAL OF ELECTRONICS, 2019, 106 (03) : 455 - 476
[26] Implementation of scalable embedded FPGA for SOC
Mrabet, Hayder
Marrakchi, Zied
Mehrez, Habib
Tissot, Andre
IEEE DTIS: 2006 INTERNATIONAL CONFERENCE ON DESIGN & TEST OF INTEGRATED SYSTEMS IN NANOSCALE TECHNOLOGY, PROCEEDINGS, 2006, : 74 - 77
[27] Some new multi-protocol attacks
Mathuria, Anish
Singh, Aditya Raj
Sharavan, P. Venkata
Kirtankar, Rohit
ADCOM 2007: PROCEEDINGS OF THE 15TH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTING AND COMMUNICATIONS, 2007, : 465 - 470
[28] FPGA-SoC based S- band Radio Frequency power amplifier control
Flores, Daniel Alejandro
IEEE MTT-S LATIN AMERICA MICROWAVE CONFERENCE (LAMC-2021), 2021,
[29] Deep CNN Co-design for HEVC CU Partition Prediction on FPGA-SoC
Bouaafia, Soulef
Khemiri, Randa
Messaoud, Seifeddine
Sayadi, Fatma Ezahra
NEURAL PROCESSING LETTERS, 2022, 54 (04) : 3283 - 3301
[30] A MULTI-PROTOCOL CAMPUS TIME SERVER
SNOW, CR
SOFTWARE-PRACTICE & EXPERIENCE, 1991, 21 (09): : 907 - 922

← 1 2 3 4 5 →