Study of the data exchange between Programmable Logic and Processor System of Zynq-7000 devices

被引：0

作者：

Melo, Rodrigo A. ^{[1
]}

Valinoti, Bruno ^{[1
]}

Amador, Marie Baly ^{[2
]}

Garcia, Luis G. ^{[2
]}

Cicuttin, Andres ^{[2
]}

Crespo, Maria Liz ^{[2
]}

机构：

[1] Inst Nacl Tecnol Ind, Ctr Micro & Nanoelect, Buenos Aires, DF, Argentina

[2] Abdus Salam Int Ctr Theoret Phys, Multidisciplinary Lab, Trieste, Italy

来源：

2019 X SOUTHERN CONFERENCE ON PROGRAMMABLE LOGIC (SPL) | 2019年

关键词：

Zynq-7000; AXI GP; AXI HP; AXI ACP; PS DMA; AXI DMA; AXI Lite; AXI Full; AXI Stream;

D O I：

10.1109/spl.2019.8714328

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

Zynq-7000 devices from Xilinx has gained strong popularity in the last years. Several documents and examples about interfaces usage and how to communicate the programmable logic with the processor are available, but some of them are not properly explained and in particular, the maximum throughput is not clearly specified. With this purpose, in this work a measurement method is presented and applied over the five available interfaces, considering the most used alternatives. Tests were carried on a Zybo board, but the results can be easily used to estimate the performance of others systems setups. Special hardware features and functionality are also discussed, providing a better understanding of system performance. Related papers were studied but none of them presents comparable information as to provide a fair comparison.

引用

页码：3 / 8

页数：6

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