HOG Feature Extractor Hardware Accelerator for Real-time Pedestrian Detection

被引:25
|
作者
Hemmati, Maryam [1 ]
Biglari-Abhari, Morteza [1 ]
Berber, Stevan [1 ]
Niar, Smail [2 ]
机构
[1] Univ Auckland, Dept Elect & Comp Engn, Auckland 1, New Zealand
[2] Univ Valenciennes & Hainaut Cambresis, Inst Sci & Tech Valenciennes, Valenciennes, France
关键词
Real-time pedestrian detection; FPGA hardware accelerator; HOG; ORIENTED GRADIENTS; HISTOGRAMS;
D O I
10.1109/DSD.2014.60
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Histogram of oriented gradients (HOG) is considered as the most promising algorithm in human detection, however its complexity and intensive computational load is an issue for real-time detection in embedded systems. This paper presents a hardware accelerator for HOG feature extractor to fulfill the requirements of real-time pedestrian detection in driver assistance systems. Parallel and deep pipelined hardware architecture with special defined memory access pattern is employed to improve the throughput while maintaining the accuracy of the original algorithm reasonably high. Adoption of efficient memory access pattern, which provides simultaneous access to the required memory area for different functional blocks, avoids repetitive calculation at different stages of computation, resulting in both higher throughput and lower power. It does not impose any further resource requirements with regard to memory utilization. Our presented hardware accelerator is capable of extracting HOG features for 60 fps (frame per second) of HDTV (1080x1920) frame and could be employed with several instances of support vector machine (SVM) classifier in order to provide multiple object detection.
引用
收藏
页码:543 / 550
页数:8
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