3-5 GHz CMOS Power Amplifier in 130nm CMOS for UWB Applications

被引：0
|
作者：
El-Feky, Nagham G. [1 ]
Ellaithy, Dina M. [2 ]
Fedawy, Mostafa [3 ,4 ]
机构：
[1] Arab Acad Sci & Technol & Maritime Transport, Elect & Communicat Dept, Modern Acad Engn & Technol, Elect & Communicat Dept,Coll Engn, Cairo, Egypt
[2] Elect Res Inst ERI, Microelect Dept, Cairo, Egypt
[3] Arab Acad Sci & Technol & Maritime Transport, Elect & Communicat Dept, Coll Engn, Cairo, Egypt
[4] Arab Acad Sci & Technol & Maritime Transport, Ctr Excellence Nanotechnol, Cairo, Egypt
来源：
2022 9TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ICEEE 2022) | 2022年
关键词：
broad range impedance matching; cascode topology; CMOS power amplifier (PA); ultra-wideband (UWB);
D O I：
10.1109/ICEEE55327.2022.9772578
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A broadband CMOS power amplifier (PA) working in frequency range starting at 3 GHz to 5 GHz in 130 nm CMOS process for ultra-wideband (UWB) implementations is accomplished in this paper. A cascode scheme (common source transistor followed by common gate transistor) is employed in the design of the achieved power amplifier. To boost the power gain, two stages cascode amplifier with a common source (CS) scheme as the third stage are used covering the operating band. This PA attains a power gain of about 18.86 dB and reaches an excellent flatness of about +/- 0.3. The output P1dB is about -3 dBm. A broad range of impedance matching at input and output is accomplished. The input return loss (S11), the output return loss (S22), and the reverse isolation (S12) equal about <-5 dB, <-3 dB, and <-100 dB, respectively.
引用
收藏
页码：32 / 35
页数：4
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