A low voltage current reuse LNA in a 130nm CMOS technology for UWB applications

被引：0
|
作者：
Taris, T. [1 ]
Begueret, J. B. [1 ]
Deval, Y. [1 ]
机构：
[1] Univ Bordeaux 1, IXL Lab, F-33405 Talence, France
来源：
2007 EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE, VOLS 1 AND 2 | 2007年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A resistive current reuse UWB LNA implemented in a 130 nm CMOS technology is here reported. Covering a 2 to 9 GHz band, the circuit provides an 11.5 dB gain for a 4.45 dB minimum noise figure. Across the frequency band of interest, the NF is kept below 9 dB. The broadband behaviour of the input stage allows achieving a very wide input matching. As well S, I is lower than -12dB from 1 to 14.8GHz while bias current of reuse limits power consumption of the LNA core to 12 mA under 1.4V supply voltage. The chip size is here 0.63mm(2) including pads, thus depicting the lowest silicon area reported in the state of the art for such UWB LNA.
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收藏
页码：555 / 558
页数：4
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