A CMOS 6-bit, I GHz ADC for IF sampling applications

被引：0
|
作者：
Uyttenhove, K [1 ]
Steyaert, M [1 ]
机构：
[1] Katholieke Univ Leuven, ESAT MICAS, B-3001 Heverlee, Belgium
来源：
2001 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-3 | 2001年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The design plan and measurement results of a very high speed 6-bit CMOS Flash Analog-to-digital converter (ADC) are presented. The very high acquisition speed is obtained by improved comparator design and optimized pre-amplifier design. At these high frequencies power-efficient error correction logic is necessary. Measurements show the high conversion speed of the ADC. Maximum acquisition speed is above 1 GHz.
引用
收藏
页码：2131 / 2134
页数：4
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