A full chip scale numerical simulation method for thermal management of 3D IC

Thermal issue is becoming more and more serious when integrated circuits (IC) further explores along the road of More Moore with dramatic increments of integration degree and power density. Thermal management, including thermal design, modeling, and optimization, has been an important concern in the system-level design of 3D IC. Current thermal modeling for a system level 3D IC design usually relies on a simplified thermal resistance network, which requires trade-offs between the model complexity and the simulation accuracy. Comparing to traditional thermal resistance based model, finite element simulation can provide a more accurate simulation for the thermal management of 3D IC. However, a full chip scale numerical simulation is still lack as an unacceptable huge grid number is unavoidable to deal with the geometric size mismatch existed in a 3D IC. Moreover, current finite element method based numerical simulation tools have no direct supports for the thermal management of 3D IC, since the placement design usually consists a complex data structure from a 3D IC. A method to bridge the finite element method and the 3D IC placement is introduced in this work. The whole bridge process includes placement data structure extraction, 3D IC system model generation, structure, mesh, solver configuration, calculation, and post data analysis. A full chip scale numerical simulation was demonstrated based the present bridge method along with the recently reported equivalent thermal conductivity simplified model.