A Graded Channel Dual-Material Gate Junctionless MOSFET for Analog Applications

被引:18
|
作者
Pathak, Varsha [1 ]
Saini, Gaurav [1 ]
机构
[1] Natl Inst Technol Kurukshetra, Kurukshetra 136119, Haryana, India
关键词
Cut-off frequency; dual-material gate (DMG); graded channel; short channel effects (SCE); workfunction;
D O I
10.1016/j.procs.2017.12.105
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This paper presents a graded channel dual material gate junctionless transistor (GC-DMGJLT) for analog applications. We studied various performance parameters of GC-DMGJLT and compared them with uniform channel dual material gate junctionless transistor (UC-DMGJLT) using Sentaurus TCAD device simulator. The simulation results specify the superiority of GC-DMGJLT that yields higher values of drain current (I-d), transconductance (gm) and cut-off frequency (f(t)) at the cost of slight increase in output transconductance (g(ds)). Furthermore, besides DIBL all other short channel parameters are also suppressed in graded channel device resulting in its superiority over uniform channel device. (C) 2018 The Authors. Published by Elsevier B.V.
引用
收藏
页码:825 / 831
页数:7
相关论文
共 50 条
  • [1] The impact of gate misalignment on the analog performance of a dual-material double gate junctionless transistor
    S.Intekhab Amin
    R.K.Sarin
    [J]. Journal of Semiconductors, 2015, (09) : 51 - 57
  • [2] The impact of gate misalignment on the analog performance of a dual-material double gate junctionless transistor
    Amin, S. Intekhab
    Sarin, R. K.
    [J]. JOURNAL OF SEMICONDUCTORS, 2015, 36 (09)
  • [3] A Junctionless Nanowire Transistor With a Dual-Material Gate
    Lou, Haijun
    Zhang, Lining
    Zhu, Yunxi
    Lin, Xinnan
    Yang, Shengqi
    He, Jin
    Chan, Mansun
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (07) : 1829 - 1836
  • [4] The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges
    Subba Rao Suddapalli
    Bheema Rao Nistala
    [J]. Journal of Computational Electronics, 2021, 20 : 492 - 502
  • [5] The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges
    Suddapalli, Subba Rao
    Nistala, Bheema Rao
    [J]. JOURNAL OF COMPUTATIONAL ELECTRONICS, 2021, 20 (01) : 492 - 502
  • [6] Investigation of graded channel effect on analog/linearity parameter analysis of junctionless surrounded gate graded channel MOSFET
    Sarita Misra
    Sudhansu Mohan Biswal
    Biswajit Baral
    Sudhansu Kumar Pati
    [J]. SN Applied Sciences, 2023, 5
  • [7] Investigation of graded channel effect on analog/linearity parameter analysis of junctionless surrounded gate graded channel MOSFET
    Misra, Sarita
    Biswal, Sudhansu Mohan
    Baral, Biswajit
    Pati, Sudhansu Kumar
    [J]. SN APPLIED SCIENCES, 2023, 5 (12)
  • [8] Study of Analog/Rf and Stability Investigation of Surrounded Gate Junctionless Graded Channel MOSFET(SJLGC MOSFET)
    Sarita Misra
    Sudhansu Mohan Biswal
    Biswajit Baral
    Sanjit Kumar Swain
    Sudhansu Kumar Pati
    [J]. Silicon, 2022, 14 : 6391 - 6402
  • [9] Study of Analog/Rf and Stability Investigation of Surrounded Gate Junctionless Graded Channel MOSFET(SJLGC MOSFET)
    Misra, Sarita
    Biswal, Sudhansu Mohan
    Baral, Biswajit
    Swain, Sanjit Kumar
    Pati, Sudhansu Kumar
    [J]. SILICON, 2022, 14 (11) : 6391 - 6402
  • [10] Increasing ION/IOFF by embedding a low doped buried layer in the channel of a dual-material double-gate junctionless MOSFET
    Beigi, Kobra
    Hashemi, Seyed Amir
    [J]. INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS, 2020, 33 (01)