FLIPPED VOLTAGE FOLLOWER ANALOG NONLINEAR CIRCUITS

被引:0
|
作者
Sakul, Chaiwat [1 ]
Dejhan, Kobchai
机构
[1] Rajamangala Univ Technol, Dept Technol, Srivijaya 92000, Trang, Thailand
关键词
Flipped voltage follower; CMOS; squarer; MULTIPLIER;
D O I
10.1142/S0218126612500247
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper describes squaring and square-rooting circuits operable on low voltage supplies, with their application proposed hereby as vector-summation and four-quadrant multiplier circuits. These circuits make use of a flipped voltage follower (FVF) as fundamental circuit. A detail classification of basic topologies derived from the FVF is given. The proposed circuits have simple structure, wide input range and low power consumption as well as small number of devices. All circuits are also examined and supported by a set of simulations with PSpice program. The circuits can operate at power supply of +/-0.7 volts, the input voltage range of the squaring circuit is +/-0.8 volts with 1.59% relative error and 1.78 mu W power dispersion, the input current of the square-rooting circuit is about 50 mu A with 0.55% relative error and 1.4 mu W power dispersion and the vector-summation circuit have linearity error of 0.23% and 2.92 mu W power dispersion. As in four-quadrant multiplier circuit, the total harmonic distortion of the multiplier is less than 1.2% for 0.8 VP-P input signal at 1MHz fundamental frequency. Experimental result is carried out to confirm the operation by using commercial CMOS transistor arrays (CD4007). These circuits are highly expected to be effective in further application of the low voltage analog signal processing.
引用
收藏
页数:15
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