Implementation of PCI Express bus communication for FPGA-based data acquisition system

被引：5

作者：

Byszuk, Adrian ^{[1
]}

Kolodziejski, Jacek ^{[1
]}

Kasprowicz, Grzegorz ^{[1
]}

Pozniak, Krzysztof ^{[1
]}

Zabolotny, Wojciech M. ^{[1
]}

机构：

[1] Warsaw Univ Technol, Fac Elect & Informat Technol, PL-00655 Warsaw, Poland

来源：

PHOTONICS APPLICATIONS IN ASTRONOMY, COMMUNICATIONS, INDUSTRY, AND HIGH-ENERGY PHYSICS EXPERIMENTS 2012 | 2012年 / 8454卷

关键词：

pci express; field programmable gate array; device driver;

D O I：

10.1117/12.2000232

中图分类号：

P1 [天文学];

学科分类号：

0704 ;

摘要：

This paper presents a PCI Express based system dedicated for communication with FPGA in data acquisition systems. The system consisted of FPGA IP core containing PCIE endpoint tightly coupled with with the user core (further denoted as "USR core") and the DDR3 memory controller, together with Linux device driver. The Linux OS was running on top of typical x86-64 system.

引用

页数：6

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