A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization

被引:0
|
作者
Ma, Yuzhe [1 ]
Gao, Jhih-Rong [2 ]
Kuang, Jian [2 ]
Miao, Jin [2 ]
Yu, Bei [1 ]
机构
[1] Chinese Univ Hong Kong, CSE Dept, Hong Kong, Hong Kong, Peoples R China
[2] Cadence Design Syst, San Jose, CA USA
关键词
ALGORITHM; DESIGN;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In advanced technology nodes, layout decomposition and mask optimization are two key stages in integrated circuit design. Due to the inconsistency of the objectives of these two stages, the performance of conventional layout and mask optimization may be suboptimal. To tackle this problem, in this paper we propose a unified framework, which seamlessly integrates layout decomposition and mask optimization. We propose a gradient based approach to solve the unified mathematical formulation, as well as a set of discrete optimization techniques to avoid being stuck in local optimum. The conventional optimization process can be accelerated as some inferior decompositions can be smartly pruned in early stages. The experimental results show that the proposed unified framework can achieve more than 17x speed-up compared with the conventional two-stage flow, meanwhile it can reduce EPE violations by 18%, and thus maintain better design quality.
引用
收藏
页码:81 / 88
页数:8
相关论文
共 50 条
  • [21] A UNIFIED MULTILEVEL FRAMEWORK OF UPSCALING AND DOMAIN DECOMPOSITION
    Sandvin, Andreas
    Nordbotten, Jan M.
    Aavatsmark, Ivar
    PROCEEDINGS OF THE XVIII INTERNATIONAL CONFERENCE ON COMPUTATIONAL METHODS IN WATER RESOURCES (CMWR 2010), 2010, : 1060 - 1067
  • [22] Supreme lithographic performance by simple mask layout based on lithography and layout co-optimization
    Tsujita, Koichiro
    Arai, Tadashi
    Ishii, Hiroyuki
    Gyoda, Yuichi
    Takahashi, Kazuhiro
    Axelrad, Valery
    Smayling, Michael C.
    OPTICAL MICROLITHOGRAPHY XXIV, 2011, 7973
  • [23] A unified framework for schedule and storage optimization
    Thies, W
    Vivien, F
    Sheldon, J
    Amarasinghe, S
    ACM SIGPLAN NOTICES, 2001, 36 (05) : 232 - 242
  • [24] A unified optimization framework for microelectronics industry
    Li, Yiming
    Chen, Cheng-Kai
    Cho, Yen-Yu
    GECCO 2006: GENETIC AND EVOLUTIONARY COMPUTATION CONFERENCE, VOL 1 AND 2, 2006, : 1875 - +
  • [25] Double Patterning Layout Decomposition for Simultaneous Conflict and Stitch Minimization
    Yuan, Kun
    Yang, Jae-Seok
    Pan, David Z.
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (02) : 185 - 196
  • [26] Double Patterning Layout Decomposition for Simultaneous Conflict and Stitch Minimization
    Yuan, Kun
    Yang, Jae-Seok
    Pan, David Z.
    ISPD 2009 ACM INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN, 2009, : 107 - 114
  • [27] MAED: Mask assignment encoder decoder solver for multiple patterning layout decomposition
    Yu, Fang
    Shen, Jiwei
    Lyu, Shujing
    Lu, Yue
    EXPERT SYSTEMS WITH APPLICATIONS, 2025, 268
  • [28] Layout-based logic decomposition for timing optimization
    Lian, YY
    Lin, YL
    PROCEEDINGS OF ASP-DAC '99: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1999, 1999, : 229 - 232
  • [29] On simultaneous shape and material layout optimization of shell structures
    Ansola, R.
    Canales, J.
    Tarrago, J. A.
    Rasmussen, J.
    STRUCTURAL AND MULTIDISCIPLINARY OPTIMIZATION, 2002, 24 (03) : 175 - 184
  • [30] On simultaneous shape and material layout optimization of shell structures
    R. Ansola
    J. Canales
    J. A. Tarrago
    J. Rasmussen
    Structural and Multidisciplinary Optimization, 2002, 24 (3) : 175 - 184