On the avalanche multiplication mechanism in SPICE simulations of high-frequency bipolar transistors with thin basewidths and low breakdown voltages

被引：2
|
作者：
Dias, JAS [1 ]
机构：
[1] Univ Estadual Campinas, FEEC, DEMIC,Dept Elect & Microelect, Fac Elect & Comp Engn, BR-13081970 Campinas, SP, Brazil
来源：
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS | 2005年 / 59卷 / 08期
关键词：
avalanche multiplication; SPICE simulation; high-frequency transistors; thin basewidth transistors; low breakdown voltage transistors;
D O I：
10.1016/j.aeue.2005.01.010
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A very simple subcircuit model for SPICE simulation of bipolar transistors affected by the avalanche multiplication mechanism is presented. The currently available models for bipolar transistors in circuit simulators do not consider this effect, which can lead to serious simulation errors when high-frequency thin basewidths transistors with low and soft breakdown voltages are simulated. The simulated results predicted by SPICE with the proposed subcircuit are compared with the measured data obtained from several transistors with low and soft breakdown voltages and a good agreement is reported. (c) 2005 Elsevier GmbH. All rights reserved.
引用
收藏
页码：483 / 485
页数：3
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