共 50 条
- [3] Design of CMOS ternary latches [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2006, 53 (12): : 2588 - 2594
- [4] Design of Reversible Latches Optimized for Quantum Cost, Delay and Garbage Outputs [J]. 23RD INTERNATIONAL CONFERENCE ON VLSI DESIGN, 2010, : 235 - 240
- [5] Design of Low Cost Latches Based on Reversible Quantum Dot Cellular Automata [J]. 2016 SIXTH INTERNATIONAL SYMPOSIUM ON EMBEDDED COMPUTING AND SYSTEM DESIGN (ISED 2016), 2016, : 181 - 186
- [7] An analysis of several proposals for reversible latches [J]. ADVANCES AND INNOVATIONS IN SYSTEMS, COMPUTING SCIENCES AND SOFTWARE ENGINEERING, 2007, : 203 - 206