High Performance Memory Requests Scheduling Technique for Multicore Processors

被引:3
|
作者
El-Reedy, Walid [1 ]
El-Moursy, Ali A. [2 ]
Fahmy, Hossam A. H. [1 ]
机构
[1] Cairo Univ, Cairo, Egypt
[2] Univ Sharjah, Elect & Comp Engn, Sharjah, U Arab Emirates
关键词
Computer architecture; Memory management; Multicore processing;
D O I
10.1109/HPCC.2012.26
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
In modern computer systems, long memory latency is one of the main bottlenecks micro-architects are facing for leveraging the system performance especially for memory-intensive applications. This emphasises the importance of the memory access scheduling to efficiently utilize memory bandwidth. Moreover, in recent micro-processors, multithread and multicore is turned to be the default choice for their design. This resulted in more contention on memory. Hence, the effect of memory access scheduling schemes is more critical to the overall performance boost. Although memory access scheduling techniques have been recently proposed for performance improvement, most of them have overlooked the fairness among the running applications. Achieving both high-throughput and fairness simultaneously is challenging. In this paper, we focus on the basic idea of memory requests scheduling, which includes how to assign priorities to threads, what request should be served first, and how to achieve fairness among the running applications for multicore microprocessors. We propose two new memory access scheduling techniques FLRMR, and FIQMR. Compared to recently proposed techniques, on average, FLRMR achieves 8.64% speedup relative to LREQ algorithm, and FIQMR achieves 11.34% speedup relative to IQ-based algorithm. FLRMR outperforms the best of the other techniques by 8.1% in 8-cores workloads. Moreover, FLRMR improves fairness over LREQ by 77.2% on average.
引用
收藏
页码:127 / 134
页数:8
相关论文
共 50 条
  • [31] Improving CPU Performance and Equalizing Power Consumption for Multicore Processors in Agent Based Process Scheduling
    Muneeswari, G.
    Shunmuganathan, K. L.
    ADVANCES IN POWER ELECTRONICS AND INSTRUMENTATION ENGINEERING, 2011, 148 : 95 - 104
  • [32] Addressing Shared Resource Contention in Multicore Processors via Scheduling
    Zhuravlev, Sergey
    Blagodurov, Sergey
    Fedorova, Alexandra
    ACM SIGPLAN NOTICES, 2010, 45 (03) : 129 - 141
  • [33] A profiling based task scheduling approach for multicore network processors
    Tang, Feilong
    You, Ilsun
    Tang, Can
    Yu, Shui
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2015, 27 (04): : 855 - 869
  • [34] Analyzing the Energy Efficiency of the Memory Subsystem in Multicore Processors
    Catalan, Sandra
    Gonzalez-Dominguez, Jorge
    Mayo, Rafael
    Quintana-Orti, Enrique S.
    2014 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS (ISPA), 2014, : 10 - 17
  • [35] Modelling and Developing Co-scheduling Strategies on Multicore Processors
    Zhu, Huanzhou
    He, Ligang
    Gao, Bo
    Li, Kenli
    Sun, Jianhua
    Chen, Hao
    Li, Keqin
    2015 44TH INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING (ICPP), 2015, : 220 - 229
  • [36] Thread Isolation to Improve Symbiotic Scheduling on SMT Multicore Processors
    Feliu, Josue
    Sahuquillo, Julio
    Petit, Salvador
    Eeckhout, Lieven
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2020, 31 (02) : 359 - 373
  • [37] A scheduling algorithm based on critical factors for heterogeneous multicore processors
    Li, Chen
    Lin, Ziniu
    Tian, Lihua
    Zhang, Bin
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2024, 36 (07):
  • [38] Addressing Shared Resource Contention in Multicore Processors via Scheduling
    Zhuravlev, Sergey
    Blagodurov, Sergey
    Fedorova, Alexandra
    ASPLOS XV: FIFTEENTH INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS, 2010, : 129 - 141
  • [39] Boosting the Priority of Garbage: Scheduling Collection on Heterogeneous Multicore Processors
    Akram, Shoaib
    Sartor, Jennifer B.
    Van Craeynest, Kenzo
    Heirman, Wim
    Eeckhout, Lieven
    ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2016, 13 (01)
  • [40] A control-theoretical approach to thread scheduling for multicore processors
    Papadopoulos, Alessandro Vittorio
    Carone, Roberto
    Maggio, Martina
    Leva, Alberto
    2015 IEEE CONFERENCE ON CONTROL AND APPLICATIONS (CCA 2015), 2015, : 1103 - 1110