A performance study of two-phase I/O

被引:0
|
作者
Dickens, PM [1 ]
机构
[1] IIT, Dept Comp Sci, Chicago, IL 60616 USA
[2] Argonne Natl Lab, Math & Comp Sci Div, Argonne, IL 60439 USA
来源
EURO-PAR '98 PARALLEL PROCESSING | 1998年 / 1470卷
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Massively parallel computers are increasingly being used to solve large, I/O intensive applications in many different fields. For such applications, the I/O subsystem represents a significant obstacle in the way of achieving good performance. While massively parallel architectures do, in general, provide parallel I/O hardware, this alone is not sufficient to guarantee good performance. The problem is that in many applications each processor initiates many small I/O requests rather than fewer larger requests, resulting in significant performance penalties due to the high latency associated with I/O. However, it is often the case that in the aggregate the I/O requests are significantly fewer and larger. Two-phase I/O is a technique that captures and exploits this aggregate information to recombine I/O requests such that fewer and larger requests are generated, reducing latency and improving performance. In this paper, we describe om efforts to obtain high performance using two-phase I/O. In particular, we describe our first implementation which produced a sustained bandwidth of 78 MBytes per second, and discuss the steps taken to increase this bandwidth to 420 MBytes per second.
引用
收藏
页码:959 / 965
页数:7
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