An Ising Computing to Solve Combinatorial Optimization Problems

被引：0
|
作者：
Yamaoka, Masanao [1 ]
机构：
[1] Res & Dev Grp Hitachi Ltd, Tokyo, Japan
来源：
2017 FIFTH BERKELEY SYMPOSIUM ON ENERGY EFFICIENT ELECTRONIC SYSTEMS & STEEP TRANSISTORS WORKSHOP (E3S) | 2017年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An Ising computing that is specialized to solve combinatorial optimization problems is proposed. The computing maps problems to an Ising model and solves the optimization problems by its own convergence property. We proposed a CMOS implementation of Ising computing and fabricated two prototypes of the computer. The 1st generation prototype confirmed the power efficiency is 1800-times higher than that of the conventional von-Neumann computers. The 2nd generation prototype is organized by FPGA, and used to explore its applications.
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页数：3
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