Demonstrated in this work are the effects of lateral scaling on the figure of merit (R(DS(on))xQ(G)) for a pGaN, enhancement-mode HEMT. To this end, the drift length (L-drift) and the length of the gate field plate (L-GFP) have been scaled to exhibit the influence of these terms on the on-state resistance (R-DS(on)), gate charge (Q(G)), and breakdown voltage (V-BR). Results conclude that for a given field plate length, the increase in breakdown voltage as L-GD increases, saturates when L-GD is greater than L-GD(sat). For this design, with L-GFP at 5 nm, the saturation length L-GD(sat) was 6 nm. Novelty of this study comes from a comprehensive look at drift length and field plate optimization for high voltage and low figure of merit designs, specifically for the enhancement-mode pGaN structure. Taking this optimization one step further, we have mapped out R-DS(on) and Q(G) to suggest designs which optimize conduction losses versus switching losses for specificity in power electronics system design.