A method of fabricating metal-insulator-metal (MIM) capacitor in Cu/low-k backend interconnection process for RF application

被引:11
|
作者
Yu, MB [1 ]
Ning, J [1 ]
Balakumar, S [1 ]
Bliznetsov, VN [1 ]
Lo, GQ [1 ]
Balasubramanian, N [1 ]
Kwong, DL [1 ]
机构
[1] Inst Microbiol, Singapore 117685, Singapore
关键词
silicon process; MIM capacitor; Ta film delamination; passive devices;
D O I
10.1016/j.tsf.2005.09.176
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
To build Cu and low-k dielectric integrated MIM capacitor on standard CMOS silicon substrate for RFIC application, a Ta layer under the capacitor upper plate is necessary for preventing Cu diffusion into Si3N4 dielectric layer of capacitor. In the experiment, delamination was found after 1000 A Ta film deposition on top of Si3N4. SEM inspection revealed that the delamination occurred at the inter-face between BD and Si3N4. The Ta/Si3N4 delamination was solved by inserting a SiO2 layer between BD and Si3N4 layers to compensate the stress difference between the BD and Si3N4/Ta stack films. Full process technology based on Cu and low-k process line for integrating passive device on silicon substrate was thus successfully developed. (c) 2005 Elsevier B.V. All rights reserved.
引用
收藏
页码:257 / 260
页数:4
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