共 50 条
- [1] Three-level inverter configuration with common-mode voltage elimination for induction motor drive [J]. IEE PROCEEDINGS-ELECTRIC POWER APPLICATIONS, 2005, 152 (02): : 261 - 270
- [2] Three-level inverter scheme with reduced power device count for an induction motor drive with common-mode voltage elimination [J]. IET Power Electron., 2008, 1 (84-92): : 84 - 92
- [3] Three-level inverter scheme with common-mode voltage elimination for an open-end winding induction motor drive [J]. 2016 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES), 2016,
- [4] Common-mode voltage mitigation of diode clamped three-level inverter [J]. Dianli Zidonghua Shebei/Electric Power Automation Equipment, 2018, 38 (01): : 66 - 73
- [6] Common-mode parts in SVM of three-level inverter [J]. Diangong Jishu Xuebao/Transactions of China Electrotechnical Society, 2009, 24 (04): : 108 - 113
- [7] A novel PWM scheme to eliminate common-mode voltage in three-level voltage source inverter [J]. PESC 98 RECORD - 29TH ANNUAL IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1 AND 2, 1998, : 269 - 274
- [8] Common-Mode Voltage Suppression Strategy for Three-Level Pulse Width Modulation Inverter [J]. Hsi-An Chiao Tung Ta Hsueh/Journal of Xi'an Jiaotong University, 2023, 57 (03): : 160 - 172
- [9] Common-mode voltage suppression for neutral-point-clamped three-level inverter [J]. Diangong Jishu Xuebao/Transactions of China Electrotechnical Society, 2015, 30 (24): : 110 - 117
- [10] A five-level inverter scheme with common-mode voltage elimination by cascading conventional two-level and three-level NPC inverters for an induction motor drive [J]. 2007 EUROPEAN CONFERENCE ON POWER ELECTRONICS AND APPLICATIONS, VOLS 1-10, 2007, : 1689 - +