Large Scale System-in-Package (SiP) Module for Future Networking Products

With increasing data traffic requirements to support mobile devices, tablets and computers, the need for faster internet traffic is mushrooming. The routers and switches used to drive network traffic need to deliver high bandwidth and speed. Key to achieving this high speed and bandwidth is ensuring closer integration between the Application Specific Processors (ASICs) and Memory devices. Consequently, it is important to place memories as close as possible to ASICs, Standard Printed Circuit Board (PCB) design rules make it difficult to place several memories very close to ASICs, and PCBs are already densely populated. Consequently, there are two prevailing technologies that could be used to increased density: Through Silicon Vias (TSVs) or System-in-Package (SiP) modules. TSVs are still in early stages of development, whereas smaller SiP modules have already used in Networking. In this study, we outline the packaging design and assembly and board level assembly of a very large (90 x 90 mm) SiP module with 14 packaged DDR3 memories and 1 flip chip ASIC mounted on a common Ball Grid Array (BGA) substrate. Finite Element Analysis was performed to estimate the optimal stiffener and lid parameters for minimal warpage. Complete substrates were assembled with key metrics measured at each step of the assembly process. Excellent coplanarity was achieved in the assembly process. The SiP modules were then mounted on PCBs and the board level assembly process characterized. The modules were successfully mounted on the PCBs. The procedures and key learning from this evaluation will be outlined in this study.