Constrained Signal Selection for Post-Silicon Validation

被引:0
|
作者
Basu, Kanad [1 ]
Mishra, Prabhat [1 ]
Patra, Priyadarsan [2 ]
机构
[1] Univ Florida, Gainesville, FL 32610 USA
[2] Post Si Validation Architecture Intel Corp, Folsom, CA USA
关键词
STATE RESTORATION;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Limited signal observability is a major concern during post-silicon validation. On-chip trace buffers store a small number of signal states every cycle. Existing signal selection techniques are designed to select a set of signals based on the trace buffer width. In a real-life scenario, it is reasonable that a designer has determined some important signals that must be traced. In this paper, we study the constrained signal selection problem where a set of trace signals are already provided by the designer and the remaining signals have to be determined to improve overall restoration performance. Our experimental results using ISCAS'89 benchmarks demonstrate that up to 5% improvement can be obtained in restoration performance compared to existing approaches.
引用
收藏
页码:71 / 75
页数:5
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