A low-power adiabatic Content-Addressable Memory

被引：0

作者：

Zhang, Sheng ^{[1
]}

Hu, Jianping ^{[1
]}

Zhou, Dong ^{[1
]}

机构：

[1] Ningbo Univ, Fac Informat Sci & Technol, Ningbo 315211, Zhejiang, Peoples R China

来源：

2007 50TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3 | 2007年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a novel CAM (Content-Addressable Memory) using CPAL (Complementary Pass-Transistor Adiabatic Logic) circuits. All circuits except for CAM cells are realized using CPAL circuits. The match-lines are driven using bootstrapped NMOS switches. The charge of large node capacitance on match-lines, bit-lines, word-lines, and address-lines is well recovered in fully adiabatic manner. The power consumption of the proposed CAM is greatly reduced. Simulations show that the proposed CAM attains energy saving of 84% to 92% for search operation compared to the conventional CMOS implementation from 10MHz to 100MHz.

引用

页码：1031 / 1034

页数：4

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