Reliability analysis of component-level redundant topologies for solid-state fault current limiter

被引:14
|
作者
Farhadi, Masoud [1 ]
Abapour, Mehdi [1 ]
Mohammadi-Ivatloo, Behnam [1 ]
机构
[1] Univ Tabriz, Dept Elect & Comp Engn, 29 Bahman Blvd, Tabriz, Iran
关键词
Power electronics; semiconductors; fault current limiter; reliability; redundant; USAGE MODEL APPROACH; BOOST CONVERTERS; SYSTEM; INVERTER; DESIGN;
D O I
10.1080/00207217.2017.1378380
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Experience shows that semiconductor switches in power electronics systems are the most vulnerable components. One of the most common ways to solve this reliability challenge is component-level redundant design. There are four possible configurations for the redundant design in component level. This article presents a comparative reliability analysis between different component-level redundant designs for solid-state fault current limiter. The aim of the proposed analysis is to determine the more reliable component-level redundant configuration. The mean time to failure (MTTF) is used as the reliability parameter. Considering both fault types (open circuit and short circuit), the MTTFs of different configurations are calculated. It is demonstrated that more reliable configuration depends on the junction temperature of the semiconductor switches in the steady state. That junction temperature is a function of (i) ambient temperature, (ii) power loss of the semiconductor switch and (iii) thermal resistance of heat sink. Also, results' sensitivity to each parameter is investigated. The results show that in different conditions, various configurations have higher reliability. The experimental results are presented to clarify the theory and feasibility of the proposed approaches. At last, levelised costs of different configurations are analysed for a fair comparison.
引用
收藏
页码:541 / 558
页数:18
相关论文
共 50 条
  • [1] Analysis and experimental tests of a solid-state fault current limiter
    Alexandre Bitencourt
    Cauê Nogueira
    Gabriel dos Santos
    D. H. N. Dias
    B. W. França
    F. Sass
    G. G. Sotelo
    [J]. Electrical Engineering, 2023, 105 : 3219 - 3228
  • [2] Analysis and experimental tests of a solid-state fault current limiter
    Bitencourt, Alexandre
    Nogueira, Caue
    dos Santos, Gabriel
    Dias, D. H. N.
    Franca, B. W.
    Sass, F.
    Sotelo, G. G.
    [J]. ELECTRICAL ENGINEERING, 2023, 105 (5) : 3219 - 3228
  • [3] Software reliability analysis with component-level fault tolerance
    Gokhale, SS
    [J]. ANNUAL RELIABILITY AND MAINTAINABILITY SYMPOSIUM, 2005 PROCEEDINGS, 2005, : 610 - 614
  • [4] Harmonic analysis and improvement of a new solid-state fault current limiter
    Ahmed, MMR
    Putrus, GA
    Ran, L
    Xiao, LJ
    [J]. IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 2004, 40 (04) : 1012 - 1019
  • [5] Fault current limiter with solid-state circuit breakers
    Balan, H.
    Neamt, L.
    Buzdugan, M. I.
    Varodi, T.
    Pop, E.
    [J]. INTERNATIONAL CONFERENCE ON INNOVATIVE IDEAS IN SCIENCE (IIS2015), 2016, 144
  • [6] Solid-State Switches for Fault Current Limiter Control
    Ganev, Georgi
    Karadzhov, Nikolai
    Hinov, Krastjo
    Kostov, Dinyo
    [J]. 2014 18TH INTERNATIONAL SYMPOSIUM ON ELECTRICAL APPARATUS AND TECHNOLOGIES (SIELA), 2014,
  • [7] Development of an Efficient Solid-State Fault Current Limiter for Microgrid
    Ghanbari, Teymoor
    Farjah, Ebrahim
    [J]. IEEE TRANSACTIONS ON POWER DELIVERY, 2012, 27 (04) : 1829 - 1834
  • [8] A 4 kV Silicon Carbide Solid-State Fault Current Limiter
    Saadeh, Osama S.
    Johnson, Erik D.
    Saadeh, Mahmood S.
    Mejia, Andres Escobar
    Schirmer, Christopher
    Rowden, Brian
    Mantooth, Alan
    Balda, Juan
    Ang, Simon
    [J]. 2012 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE), 2012, : 4445 - 4449
  • [9] Power quality improvement using a solid-state fault current limiter
    Ahmed, MMR
    Putrus, GA
    Ran, L
    [J]. IEEE/PES TRANSMISSION AND DISTRIBUTION CONFERENCE AND EXHIBITION 2002: ASIA PACIFIC, VOLS 1-3, CONFERENCE PROCEEDINGS: NEW WAVE OF T&D TECHNOLOGY FROM ASIA PACIFIC, 2002, : 1059 - 1064
  • [10] Proposal and Verification of A Novel DC Solid-state Fault Current Limiter
    Wang, Panbao
    Wei, Wei
    Mao, Zhiqiang
    Hao, Xin
    Wang, Wei
    Xu, Dianguo
    [J]. 2021 24TH INTERNATIONAL CONFERENCE ON ELECTRICAL MACHINES AND SYSTEMS (ICEMS 2021), 2021, : 2156 - 2160