A Load-Pull Wafer-Mapper

被引:0
|
作者
Vanaverbeke, F. [1 ]
Vaesen, K. [1 ]
Xiao, D. [1 ]
Pauwels, L. [1 ]
De Raedt, W. [1 ]
Germain, A. [1 ]
Degroote, S. [1 ]
Das, J. [1 ]
Derluyn, J. [1 ]
Schreurs, D. [1 ]
机构
[1] IMEC Vzw, B-3001 Heverlee, Belgium
关键词
Automated; Waferstepper; Load Pull; GaN; wafermaps;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes an automated load-pull measurement testbench for the characterization of GaN power HEMTs. The setup was built around a vector network analyzer (VNA) and an electromechanical tuner. The setup is combined with a semi-automatic wafer-stepper, allowing for complete large-signal wafer-mapping. Both calibration and measurement procedure are explained in mathematical detail.
引用
收藏
页码:1702 / 1708
页数:7
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