Off-Chip Memory Encryption and Integrity Protection Based on AES-GCM in Embedded Systems

被引:2
|
作者
Liu, Zhenglin [1 ]
Zhu, Qingchun [1 ]
Li, Dongfang [1 ]
Zou, Xuecheng [1 ]
机构
[1] Huazhong Univ Sci & Technol, Sch Opt & Elect Informat, Wuhan 430074, Peoples R China
基金
中国国家自然科学基金;
关键词
Embedded system; Random access memory; Computer security; Encryption; AES-GCM; Memory Encryption; Memory Integrity; Hardware Architecture; AUTHENTICATION;
D O I
10.1109/MDAT.2013.2255912
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A typical embedded system usually consists of two major hardware components: a System on Chip (SoC) chip and off-chip Random Access Memory (RAM). The bus between the SoC chip and the offchip RAMs is one of the weakest points in an embedded system. For unprotected systems, an adversary can easily probe the bus to read or corrupt data in the form of data injection. Therefore, finding a solution to ensure data confidentiality and data integrity of the off-chip memory is vital to the overall embedded system security. The bus between the SoC chip and the off-chip memory and the off-chip memory itself are untrusted, and are susceptible to physical attacks, such as bus probing and memory tampering. AEGIS is an another memory security solution. Because of the use of hash tree-based technology, the on-chip memory overhead of AEGIS is greatly reduced, but it still has a nonnegligible performance loss when a cache miss occurs.
引用
收藏
页码:54 / 62
页数:9
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