A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/μs Slope and 1.2GHz Chirp Bandwidth

被引：0
|
作者：
Renukaswamy, Pratap Tumkur [1 ,2 ]
Markulic, Nereo [1 ]
Park, Sehoon [1 ,2 ]
Kankuppe, Anirudh [1 ,2 ]
Shi, Qixian [1 ]
Wambacq, Piet [1 ,2 ]
Craninckx, Jan [1 ]
机构：
[1] IMEC, Leuven, Belgium
[2] Vrije Univ Brussel, Brussels, Belgium
来源：
2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC) | 2020年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：278 / +
页数：3
相关论文
共 7 条
  • [1] A 12-mW 10-GHz FMCW PLL Based on an Integrating DAC With 28-kHz RMS-Frequency-Error for 23-MHz/μs Slope and 1.2-GHz Chirp-Bandwidth
    Renukaswamy, Pratap Tumkur
    Markulic, Nereo
    Wambacq, Piet
    Craninckx, Jan
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2020, 55 (12) : 3294 - 3307
  • [2] A High-Linear PLL-based FMCW Frequency Synthesizer with 42kHz rms FM Error and 1.2-GHz Chirp Bandwidth
    Zhang, Zitong
    Lu, Yuri
    Wu, Xiaoyuan
    Deng, Hao
    Shi, Chunqi
    Huang, Leilei
    Chen, Jinghong
    Zhang, Runxi
    IEICE ELECTRONICS EXPRESS, 2024,
  • [3] A high-linear PLL-based FMCW frequency synthesizer with 42-kHz rms FM error and 1.2-GHz chirp bandwidth
    Zhang, Zitong
    Lu, Yuri
    Wu, Xiaoyuan
    Deng, Hao
    Shi, Chunqi
    Huang, Leilei
    Chen, Jinghong
    Zhang, Runxi
    IEICE ELECTRONICS EXPRESS, 2024, 21 (10):
  • [4] A High-Linear PLL-based FMCW Frequency Synthesizer with 42-kHz rms FM Error and 1.2-GHz Chirp Bandwidth
    Zhang, Zitong
    Lu, Yuri
    Wu, Xiaoyuan
    Deng, Hao
    Shi, Chunqi
    Huang, Leilei
    Chen, Jinghong
    Zhang, Runxi
    2024 IEEE WIRELESS AND MICROWAVE TECHNOLOGY CONFERENCE, WAMICON, 2024,
  • [5] A 24 GHz Self-Calibrated All-Digital FMCW Synthesizer With 0.01% RMS Frequency Error Under 3.2 GHz Chirp Bandwidth and 320 MHz/μs Chirp Slope
    Shen, Zhengkun
    Jiang, Haoyun
    Yang, Fan
    Wang, Yixiao
    Zhang, Zherui
    Liu, Junhua
    Liao, Huailin
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2022, 57 (07) : 2167 - 2180
  • [6] A 24GHz Self-Calibrated ADPLL-Based FMCW Synthesizer with 0.01% rms Frequency Error Under 3.2GHz Chirp Bandwidth and 320MHz/μs Slope
    Shen, Zhengkun
    Jiang, Haoyun
    Yang, Fan
    Wang, Yixiao
    Zhang, Zherui
    Liu, Junhua
    Liao, Huailin
    2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), 2021, 64 : 450 - +
  • [7] A 74GHz-80GHz 1.2GHz/μs-Slope 20.9mW FMCW Synthesizer with TDC-Gain-Independent Loop-Bandwidth Employing a TDC-Offset-Free Type-II Digital PLL and a Linearized Hybrid-Tuning DCO
    Liu, Yi
    Jing, Zixi
    Liu, Zhiyu
    Yip, Chi C.
    Zong, Zhirui
    Luong, Howard C.
    2024 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, RFIC 2024, 2024, : 207 - 210
1