A 74GHz-80GHz 1.2GHz/μs-Slope 20.9mW FMCW Synthesizer with TDC-Gain-Independent Loop-Bandwidth Employing a TDC-Offset-Free Type-II Digital PLL and a Linearized Hybrid-Tuning DCO

被引：0

作者：

Liu, Yi ^{[1
]}

Jing, Zixi ^{[1
]}

Liu, Zhiyu ^{[1
]}

Yip, Chi C. ^{[1
]}

Zong, Zhirui ^{[2
]}

Luong, Howard C. ^{[1
]}

机构：

[1] Hong Kong Univ Sci & Technol, Hong Kong, Peoples R China

[2] Hong Kong Univ Sci & Technol Guangzhou, Guangzhou, Peoples R China

来源：

2024 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, RFIC 2024 | 2024年

关键词：

Bang-Bang TDC; FMCW frequency synthesizer; magnetic tuning; Type-II Digital PLL;

D O I：

10.1109/RFIC61187.2024.10600027

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 74-80 GHz self-adapted sawtooth-FMCW frequency synthesizer features a Type-II digital PLL with zero TDC offset independent of chirp rate, TDC-gain-independent loop bandwidth, a 25kHz- resolution glitch-free wideband linear digitally controlled oscillator (DCO) with a dedicated convergence-less digital pre-distortion (DPD). The prototype measures 6-GHz chirp bandwidth with a 1.2GHz/us slope at 77GHz while achieving 0.031% rms chirp error and consuming 20.9mW from 0.9V supply.

引用

页码：207 / 210

页数：4