Dynamic compilation framework with DVS for reducing energy consumption in embedded processors

被引：3
|
作者：
Shi, Qingsong [1 ]
Chen, Tianzhou [1 ]
Liang, Xiao [1 ]
Huang, Jiangwei [1 ]
机构：
[1] Zhejiang Univ, Coll Comp Sci, Hangzhou 310003, Zhejiang, Peoples R China
来源：
PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS | 2008年
关键词：
dynamic compiler; DVS; run-time region;
D O I：
10.1109/ICESS.2008.47
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Dynamic Voltage Scaling (DVS) is an effective technique for reducing the energy consumption in embedded systems. There are several advantages using DVS technique into compiler framework. This paper present a framework for reducing energy consumption in embedded processors using the dynamic compiler collaborate with DVS technique. Two algorithms are implemented in this framework, and the framework is implemented using the Intel PIN systems and is deployed in a real hardware platform. Experimental results based on the software and hardware platform, show that significant energy saving are achieved while performance loss less than 5%.
引用
收藏
页码：464 / 470
页数：7
相关论文
共 50 条
  • [21] Targeting dynamic compilation for embedded environments
    Chen, M
    Olukotun, K
    [J]. USENIX ASSOCIATION PROCEEDINGS OF THE 2ND JAVA(TM) VIRTUAL MACHINE RESEARCH AND TECHNOLOGY SYMPOSIUM, 2002, : 151 - 164
  • [22] GENETIC HEURISTICS FOR REDUCING MEMORY ENERGY CONSUMPTION IN EMBEDDED SYSTEMS
    Aouad, Maha Idrissi
    Schott, Rene
    Zendra, Olivier
    [J]. ICSOFT 2010: PROCEEDINGS OF THE FIFTH INTERNATIONAL CONFERENCE ON SOFTWARE AND DATA TECHNOLOGIES, VOL 2, 2010, : 394 - 402
  • [23] Optimal Code Layout for reducing Energy Consumption in Embedded Systems
    Balasundaram, Anuradha
    Chenniappan, Vivekanandan
    [J]. PROCEEDINGS OF THE IEEE INTERNATIONAL CONFERENCE ON SOFT-COMPUTING AND NETWORKS SECURITY (ICSNS 2015), 2015,
  • [24] Architecture Exploration for Embedded Processors Design Framework for Embedded Bio-Medical Processors
    Lakshmi, Vinay Vijendra Kumar
    Mukherjee, Arindam
    Joshi, Bharat
    [J]. 2012 PROCEEDINGS OF IEEE SOUTHEASTCON, 2012,
  • [25] Architecture Exploration for Embedded Processors Design Framework for Embedded Bio-Medical Processors
    Lakshmi, Vinay Vijendra Kumar
    Mukherjee, Arindam
    Joshi, Bharat
    [J]. 2013 PROCEEDINGS OF IEEE SOUTHEASTCON, 2013,
  • [26] Parallelizing Compilation Framework for Heterogeneous Many-core Processors
    Li, Yan-Bing
    Zhao, Rong-Cai
    Han, Lin
    Zhao, Jie
    Xu, Jin-Long
    Li, Ying-Ying
    [J]. Ruan Jian Xue Bao/Journal of Software, 2019, 30 (04): : 981 - 1001
  • [27] Dynamic Voltage and Frequency Scaling as a Method for Reducing Energy Consumption in Ultra-Low-Power Embedded Systems
    Zidar, Josip
    Matic, Tomislav
    Aleksi, Ivan
    Hocenski, Zeljko
    [J]. ELECTRONICS, 2024, 13 (05)
  • [28] Reducing Wearout in Embedded Processors Using Proactive Fine-Grain Dynamic Runtime Adaptation
    Oboril, Fabian
    Tahoori, Mehdi B.
    [J]. 2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS), 2012,
  • [29] Code refactoring techniques for reducing energy consumption in embedded computing environment
    Doohwan Kim
    Jang-Eui Hong
    Ilchul Yoon
    Sang-Ho Lee
    [J]. Cluster Computing, 2018, 21 : 1079 - 1095
  • [30] Code refactoring techniques for reducing energy consumption in embedded computing environment
    Kim, Doohwan
    Hong, Jang-Eui
    Yoon, Ilchul
    Lee, Sang-Ho
    [J]. CLUSTER COMPUTING-THE JOURNAL OF NETWORKS SOFTWARE TOOLS AND APPLICATIONS, 2018, 21 (01): : 1079 - 1095
12345