共 50 条
- [1] SyMPLES-CVL: a SysML and CVL based Approach for Product-Line Development of Embedded Systems [J]. PROCEEDINGS 2015 NINTH BRAZILIAN SYMPOSIUM ON SOFTWARE COMPONENTS, ARCHITECTURES AND REUSE - SBCARS 2015, 2015, : 21 - 30
- [2] An Approach: SysML-based Automated Requirements Verification [J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON SYSTEMS ENGINEERING (ISSE) PROCEEDINGS, 2015, : 92 - 97
- [4] The SATURN Approach to SysML-based HW/SW Codesign [J]. IEEE ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2010), 2010, : 506 - 511
- [7] A SYSML-based Approach to manage stakeholder requirements traceability [J]. 2017 IEEE/ACS 14TH INTERNATIONAL CONFERENCE ON COMPUTER SYSTEMS AND APPLICATIONS (AICCSA), 2017, : 202 - 207
- [9] VERTAF/Multi-Core: A SysML-Based Application Framework for Multi-Core Embedded Software Development [J]. ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, PROCEEDINGS, 2009, 5574 : 303 - +