A high performance HfSiON/TaN NMOSFET fabricated using a gate-last process

被引:2
|
作者
Xu Gao-Bo [1 ]
Xu Qiu-Xia [1 ]
Yin Hua-Xiang [1 ]
Zhou Hua-Jie [1 ]
Yang Tao [1 ]
Niu Jie-Bin [1 ]
Yu Jia-Han [1 ]
Li Jun-Feng [1 ]
Zhao Chao [1 ]
机构
[1] Chinese Acad Sci, Inst Microelect, Key Lab Microelect Devices & Integrated Technol, Beijing 100029, Peoples R China
基金
北京市自然科学基金;
关键词
HfSiON; TaN; gate-last process; planarization; LOW-LEAKAGE CURRENT; HIGH-K; DIELECTRICS;
D O I
10.1088/1674-1056/22/11/117309
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
A gate-last process for fabricating HfSiON/TaN n-channel metal-oxide-semiconductor-field-effect transistors (NMOSFETs) is presented. In the process, a HfSiON gate dielectric with an equivalent oxide thickness of 10 angstrom was prepared by a simple physical vapor deposition method. Poly-Si was deposited on the HfSiON gate dielectric as a dummy gate. After the source/drain formation, the poly-Si dummy gate was removed by tetramethylammonium hydroxide (TMAH) wet-etching and replaced by a TaN metal gate. Because the metal gate was formed after the ion-implant doping activation process, the effects of the high temperature process on the metal gate were avoided. The fabricated device exhibits good electrical characteristics, including good driving ability and excellent sub-threshold characteristics. The device's gate length is 73 nm, the driving current is 117 mu A/mu m under power supply voltages of V-GS = V-DS = 1.5 V and the off-state current is only 4.4 nA/mu m. The lower effective work function of TaN on HfSiON gives the device a suitable threshold voltage (similar to 0.24 V) for high performance NMOSFETs. The device's excellent performance indicates that this novel gate-last process is practical for fabricating high performance MOSFETs.
引用
收藏
页数:5
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