Understanding the Design Space of Wavelength-Routed Optical NoC Topologies for Power-Performance Optimization

Silicon photonics is the most promising emerging technology to deliver on-and off-chip communication performance and power that vastly exceed the capabilities of electronics. However, a significant abstraction gap does exist between novel devices and circuits and the higher-order switching structures that system designers need to instantiate. Currently, designers mostly rely on their intuition to bridge this abstraction gap. This paper lays the groundwork for a more rigorous and effective approach, by vertically-integrating the most advanced design methods and tools for topology synthesis and refinement in the context of a novel performance analysis framework. As a result, we can extract the highest aggregate bandwidth out of an optical network-on-chip topology, and provide an early-stage analysis of its static power, thus unveiling unexplored portions of the design space and interpreting its characteristics.