Parallel processing of Powell's optimization algorithm and its application to design of multi-way power dividers

被引：0
|
作者：
Kishihara, Mitsuyoshi [1 ]
Yamane, Kuniyoshi [1 ]
Ohta, Isao [1 ]
机构：
[1] Okayama Prefectural Univ, Soja, Okayama 7191197, Japan
来源：
2005 ASIA-PACIFIC MICROWAVE CONFERENCE PROCEEDINGS, VOLS 1-5 | 2005年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In the case of optimizing the circuit configurations such as multi-way power dividers, the planar circuit approach is useful because of its merit of short calculation time. However, as the number of design variable increases, the CPU time required in the optimization becomes large. This paper describes a parallel computing technique of Powell's optimization algorithm using a PC-Cluster, and applies to an integration design of microstrip multi-way power dividers. As a result, it is shown that the parallel processing technique can speed up the circuit optimization with facility.
引用
收藏
页码：2399 / 2402
页数：4
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