Exploring Reconfigurable Architectures for Tree-Based Option Pricing Models

被引:10
|
作者
Jin, Qiwei [1 ]
Thomas, David B. [1 ]
Luk, Wayne [1 ]
Cope, Benjamin [2 ]
机构
[1] Univ London Imperial Coll Sci Technol & Med, Dept Comp, London SW7 2AZ, England
[2] Univ London Imperial Coll Sci Technol & Med, Dept Elect & Elect Engn, Circuits & Syst Grp, London SW7 2AZ, England
基金
英国工程与自然科学研究理事会;
关键词
Design; Performance; FPGA; HyperStreams; GPU; binomial; lattice; trinomial;
D O I
10.1145/1575779.1575781
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This article explores the application of reconfigurable hardware to the acceleration of financial computation using tree-based pricing models. Two parallel pipelined architectures have been developed for option valuation using binomial trees and trinomial trees, with support for concurrent evaluation of independent options to achieve high pricing throughput. Our results show that the tree-based models executing on a Virtex 4 field programmable gate array (FPGA) at 82.7 MHz with fixed-point arithmetic can run over 160 times faster than a Core2 Duo processor at 2.2 GHz. The FPGA implementation is two times faster than the nVidia Geforce 7900GTX processor with 24 pipelines at 650 MHz, and 27%-35% slower than the nVidia Geforce 8600GTS processor with 32 Pipelines at 1450 MHz. Our preliminary experiments also indicate that while an FPGA implementation can be slower than a GPU, it could be more efficient when power consumption is taken into account.
引用
收藏
页数:17
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