Low Power VLSI Implementation of Adaptive Noise Canceller Based on Least Mean Square Algorithm

This paper presents VLSI implementation of adaptive noise canceller based on least mean square algorithm. First, the adaptive parameters are obtained by simulating noise canceller on MATLAB. Simulink model of adaptive noise canceller was developed and the noise is suppressed to a much larger extent in recovering the original signal. The data such as input and output signals, desired signal, step size factor and coefficients of adaptive filter was processed by FPGA. Finally, the functions of field programmable gate array -based system structure for adaptive noise canceller based on LMS algorithm are synthesized, simulated, and implemented on Xilinx XC3s200 field programmable gate array using Xilinx ISE tool. The research results show that it is feasible to implement and use adaptive least mean square filter based adaptive noise canceller design which consumed a low power of 0.156W at 29.1 degrees C in a single field programmable gate array chip.