A programmable VLSI architecture based on multilayer CNN paradigms for real-time visual processing

被引：0
|
作者：
Raffo, L [1 ]
Sabatini, SP [1 ]
Bisio, GM [1 ]
机构：
[1] UNIV GENOA, DEPT BIOPHYS & ELECTR ENGN, I-16145 GENOA, ITALY
来源：
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS | 1996年 / 24卷 / 03期
关键词：
D O I：
10.1002/(SICI)1097-007X(199605/06)24:3<357::AID-CTA921>3.0.CO;2-#
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new digital VLSI architecture has been presented for the implementation of discrete-time multilayer CNNs. At functional level, the architecture is organized as 12 layers of 64 x 64 cells which interact as specified by a set of 3D generalized templates. At structural level the application of cloning templates occurs in a set of processing units programmed by instruction masks, generated on the basis of the algorithm to be emulated. It is demonstrated that this architecture is applicable to multilayer algorithms for visual processing and also to standard CNNs, including those that use sequences of templates or that work in parallel. Simulations evidence the high efficiency of this implementation.
引用
收藏
页码：357 / 367
页数：11
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