Circuit techniques for ultra-low power subthreshold SRAMs

被引:16
|
作者
Kim, Tae-Hyoung [1 ]
Liu, Jason [1 ]
Keane, John [1 ]
Kim, Chris H. [1 ]
机构
[1] Univ Minnesota, Dept Elect & Comp Engn, Minneapolis, MN 55455 USA
关键词
D O I
10.1109/ISCAS.2008.4541982
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Subthreshold operation has become an important area in applications where minimal power consumption and energy efficiency are the critical constraints. In particular, ultra-low power SRAM designs are critical for implementing such applications due to the large portion of the systems that they account for. However, sub-threshold SRAMs have many design issues such as cell stability, readability, and writability. In this paper, we give an overview of sub-threshold SRAM design issues and discuss several circuit techniques. We will focus on SRAM cell stability during read and write operation, improved writability, and read port circuits for the design of an ultra-low power sub-threshold SRAMs.
引用
下载
收藏
页码:2574 / 2577
页数:4
相关论文
共 50 条
  • [1] Ultra-Low Power Circuit Techniques for Miniaturized Sensor Nodes
    Jeong, Seokhyeon
    Kim, Gyouho
    Kim, Yejoong
    Jung, Wanyeong
    Blaauw, David
    Sylvester, Dennis
    PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2015, : 170 - 173
  • [2] An Ultra-Low Power CMOS Subthreshold Voltage Reference
    Luo, Yunling
    Zhang, Jun
    Wang, Qiaobo
    Zeng, Yanhang
    Hu, Jianguo
    Tan, Hong-Zhou
    2012 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID STATE CIRCUIT (EDSSC), 2012,
  • [3] Robust subthreshold logic for ultra-low power operation
    Soeleman, H
    Roy, K
    Paul, BC
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2001, 9 (01) : 90 - 99
  • [4] Ultra-low power digital subthreshold logic circuits
    Soeleman, Hendrawan
    Roy, Kaushik
    Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers, 1999, : 94 - 96
  • [5] A novel floating gate circuit family with subthreshold voltage swing for ultra-low power operation
    Chavan, Ameet
    MacDonald, Eric
    Liu, Norman
    Neff, Joseph
    PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, : 3354 - +
  • [6] Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing
    Junchao Chen
    Kwen-Siong Chong
    Bah-Hwee Gwee
    Circuits, Systems, and Signal Processing, 2014, 33 : 3317 - 3329
  • [7] Low Power Circuit Techniques For Optimizing Power In High Speed SRAMs
    Saini, Navneet Kaur
    Gupta, Aniruddha
    Prashar, Ravija
    Gupta, Parul
    2016 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI), 2016, : 2399 - 2404
  • [8] Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing
    Chen, Junchao
    Chong, Kwen-Siong
    Gwee, Bah-Hwee
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2014, 33 (10) : 3317 - 3329
  • [9] Analysis and Design of Ultra-Low Power Subthreshold MCML Gates
    Alioto, Massimo
    Leblebici, Yusuf
    ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 2557 - +
  • [10] Ultra-Low Power Subthreshold Flip-Flop Design
    Fisher, Sagi
    Teman, Adam
    Vaysman, Dmitry
    Gertsman, Alexander
    Yadid-Pecht, Orly
    ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 1573 - 1576