Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation

被引:2
|
作者
Zhu, Qiuling [1 ]
Berger, Christian R. [2 ]
Turner, Eric L. [3 ]
Pileggi, Larry [1 ]
Franchetti, Franz [1 ]
机构
[1] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA
[2] Marvell Semicond, Wireless Syst R&D, Santa Clara, CA USA
[3] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
关键词
Synthetic aperture radar; Interpolation; Logic in memory; Chip generator;
D O I
10.1007/s11265-012-0720-4
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper we present a local interpolation-based variant of the well-known polar format algorithm used for synthetic aperture radar (SAR) image formation. We develop the algorithm to match the capabilities of the application-specific logic-in-memory processing paradigm, which off-loads lightweight computation directly into the SRAM and DRAM. Our proposed algorithm performs filtering, an image perspective transformation, and a local 2D interpolation, and supports partial and low-resolution reconstruction. We implement our customized SAR grid interpolation logic-in-memory hardware in advanced 14 nm silicon technology. Our high-level design tools allow to instantiate various optimized design choices to fit image processing and hardware needs of application designers. Our simulation results show that the logic-in-memory approach has the potential to enable substantial improvements in energy efficiency without sacrificing image quality.
引用
收藏
页码:297 / 312
页数:16
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