High speed and high resolution WTA circuit

被引：0

作者：

Vlassis, S ^{[1
]}

Siskos, S ^{[1
]}

机构：

[1] Aristotelian Univ Salonika, Dept Phys, Elect Lab, GR-54006 Salonika, Greece

来源：

ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 2: ANALOG AND DIGITAL CIRCUITS | 1999年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The winner-takes-all (WTA) circuits are very common elements in the VLSI implementation of neural networks, fuzzy systems and non-linear filters. in this paper a high speed and high resolution multiple input analogue WTA circuit is introduced. The circuit combines a current maximum selector with high-speed current comparators. A feedback circuit was used to correct the 'corner' error at the transition regions of the maximum selector. The circuit offers 56nA resolution for 50 inputs with less than 38ns delay. Simulation results, using 1.2 mu m AMS CMOS process parameters, demonstrate the feasibility of the circuit.

引用

页码：224 / 227

页数：2

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