Parallel Information Extraction on shared memory multi-processor system

被引：0

作者：

Shan, Jiulong ^{[1
]}

Chen, Yurong ^{[1
]}

Diao, Qian ^{[1
]}

Zhang, Yimin ^{[1
]}

机构：

[1] Intel Corp, Intel China Res Ctr, 8F,Raycom Infotech Pk A,2 KeXueYuan S Rd, Beijing 100080, Peoples R China

来源：

2006 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, PROCEEDINGS | 2006年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Text Mining is one of the best solutions for today and the future's information explosion. With the development of modern processor technologies, it will be a mass market desktop application in the many-core era. In Text Mining system, Information Extraction is a representative module and is the most compute intensive part. In this paper, we study the performance of parallel Information Extraction on shared memory multi-processor systems in order to gain some insights of such applications on the future's many-core architecture. In implementation, Conditional Random Fields (CRFs) algorithm is selected as the core of module Information Extraction. Based on the newest CRFs toolkit FlexCRFs, we make several serial optimizations and then parallelize it with MPI and System V. IPC/shm. We also conduct a detailed performance analysis of this parallel application on the target system.

引用

页码：311 / 318

页数：8

共 50 条

[31] Parallel Processing of Sequential Media Algorithms on Heterogeneous Multi-Processor System-on-Chip
Zhao, Peng
Wang, Dawei
Yan, Ming
Li, Sikun
[J]. JOURNAL OF COMPUTERS, 2009, 4 (06) : 477 - 484
[32] MEASURES FOR THE QUALITY OF A MULTI-PROCESSOR SYSTEM.
Hoja, H.
Zeisel, G.
[J]. Elektronische Rechenanlagen, 1974, 16 (03): : 104 - 108
[33] New multi-processor digital excitation system
Morse, CA
Mummert, CR
Martinez, RF
Gibbs, IA
Prather, EC
[J]. 2000 IEEE POWER ENGINEERING SOCIETY SUMMER MEETING, CONFERENCE PROCEEDINGS, VOLS 1-4, 2000, : 643 - 648
[34] A multi-processor system for video coding applications
Iyer, DS
Chong, MN
Cai, WT
[J]. ISCE '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, 1997, : 210 - 213
[35] Design of a novel real-shared memory module for high performance parallel processor system with shared memory
Liu, Z
Shim, J
Kurino, H
Koyanagi, M
[J]. 18TH INTERNATIONAL CONFERENCE ON ADVANCED INFORMATION NETWORKING AND APPLICATIONS, VOL 2 (REGULAR PAPERS), PROCEEDINGS, 2004, : 241 - 244
[36] Radio-Coverage Parallel Computation on Multi-Processor Platforms
Franceschetti, Giorgio
Imperatore, Pasquale
Iodice, Antonio
Riccio, Daniele
[J]. 2009 EUROPEAN MICROWAVE CONFERENCE, VOLS 1-3, 2009, : 1575 - 1578
[37] MULTI-PROCESSOR SYSTEMS
HUGHES, P
DOONE, T
[J]. MICROELECTRONICS AND RELIABILITY, 1977, 16 (04): : 281 - 293
[38] An efficient multi-processor architecture for parallel cyclic reference counting
Lins, RD
[J]. HIGH PERFORMANCE COMPUTING FOR COMPUTATIONAL SCIENCE - VECPAR 2002, 2003, 2565 : 650 - 663
[39] Automated memory-aware application distribution for Multi-processor System-on-Chips
Orsila, Heikki
Kangas, Tero
Salminen, Erno
Hamalainen, Timo D.
Hannikainen, Marko
[J]. JOURNAL OF SYSTEMS ARCHITECTURE, 2007, 53 (11) : 795 - 815
[40] Hash Join Optimization Based on Shared Cache Chip Multi-processor
Deng Yadan
Jing Ning
Xiong Wei
Chen Luo
Chen Hongsheng
[J]. DATABASE SYSTEMS FOR ADVANCED APPLICATIONS, PROCEEDINGS, 2009, 5463 : 293 - 307

← 1 2 3 4 5 →