Combining Error Statistics with Failure Prediction in Memory Page Offlining

Memory errors constitute a large fraction of total hardware failures on modern systems, negatively impacting their reliability, availability, and serviceability. Error correcting codes have been developed to detect and correct the errors. Error-prevention mechanisms such as soft page offlining has been implemented in modern operating systems. Common offlining policies are based on error rate statistics in a certain past period. However, future error occurrences depend on both the wear level of the faulty memory cells and the implicit runtime context which may not be reflected in the statistics in the period. This paper proposes a new offlining policy which combines error statistics with failure prediction of the memory cells in a page. Using a failure prediction component, the new approach is more effective in mining the combined effect of both the hardware wear level and the runtime context. Scoring with both the error statistics and the prediction confidence, the new policy is more comprehensive in offlining error-prone pages to avoid more errors. Empirical evaluation demonstrates that the new policy outperforms the baseline policies based on historical error statistics.