GOAHEAD: A Partial Reconfiguration Framework

被引:75
|
作者
Beckhoff, Christian [1 ]
Koch, Dirk [1 ]
Torresen, Jim [1 ]
机构
[1] Univ Oslo, Dept Informat, N-0316 Oslo, Norway
关键词
D O I
10.1109/FCCM.2012.17
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Exploiting the benefits of partial run-time reconfiguration requires efficient tools. In this paper, we introduce the tool GOAHEAD that is able to implement run-time reconfigurable systems for all recent Xilinx FPGAs. This includes in particular support for low cost and low power Spartan-6 FPGAs. GoAhead assists during floorplanning and automates the constraint generation. It interacts with the Xilinx vendor tools and triggers the physical implementation phases all the way down to the final configuration bitstreams. GOAHEAD enables the building of flexible systems for integrating many reconfigurable modules very efficiently into a system. The tool targets (re) usability, portability to future devices, and migration paths among reconfigurable systems featuring different FPGAs or even FPGA families. Moreover, it provides a scripting interface and all features can be accessed remotely.
引用
收藏
页码:37 / 44
页数:8
相关论文
共 50 条
  • [41] Traversability, Reconfiguration, and Reachability in the Gadget Framework
    Ani, Joshua
    Demaine, Erik D.
    Diomidov, Yevhenii
    Hendrickson, Dylan
    Lynch, Jayson
    ALGORITHMICA, 2023, 85 (11) : 3453 - 3486
  • [42] Digital Twin Framework for Reconfiguration Management
    Caesar, Birte
    Tilbury, Dawn M.
    Barton, Kira
    Fay, Alexander
    2022 IEEE 18TH INTERNATIONAL CONFERENCE ON AUTOMATION SCIENCE AND ENGINEERING (CASE), 2022, : 1807 - 1813
  • [43] Dynamic partial FPGA reconfiguration in space applications
    Graczyk, Rafal
    Stolarski, Marcin
    Palau, Marie-Catherine
    Orleanski, Piotr
    PHOTONICS APPLICATIONS IN ASTRONOMY, COMMUNICATIONS, INDUSTRY, AND HIGH-ENERGY PHYSICS EXPERIMENTS 2012, 2012, 8454
  • [44] Customizing Virtual Networks with Partial FPGA Reconfiguration
    Yin, Dong
    Unnikrishnan, Deepak
    Liao, Yong
    Gao, Lixin
    Tessier, Russell
    ACM SIGCOMM COMPUTER COMMUNICATION REVIEW, 2011, 41 (01) : 125 - 132
  • [45] Partial Scalability to Ensure Reliable Dynamic Reconfiguration
    Ghafari, Mohammad
    Heydarnoori, Abbas
    2013 IEEE SEVENTH INTERNATIONAL CONFERENCE ON SELF-ADAPTATION AND SELF-ORGANIZING SYSTEMS WORKSHOPS (SASOW), 2014, : 84 - 89
  • [46] Runtime Partial Reconfiguration of FPGAs for DSP Applications
    Ali, M. Mubarak
    Arun, R.
    Saravanan, S.
    INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY AND SYSTEM DESIGN 2011, 2012, 30 : 514 - 518
  • [47] Partial reconfiguration bitstream compression for virtex FPGAs
    Gu Haiyun
    Chen Shurong
    CISP 2008: FIRST INTERNATIONAL CONGRESS ON IMAGE AND SIGNAL PROCESSING, VOL 5, PROCEEDINGS, 2008, : 183 - 185
  • [48] ZipStream: improving dependability in Dynamic Partial Reconfiguration
    Di Carlo, Stefano
    Gambardella, Giulio
    Trong Huynh Bao
    Prinetto, Paolo
    Rolfo, Daniele
    Trotta, Pascal
    2013 8TH INTERNATIONAL DESIGN AND TEST SYMPOSIUM (IDT), 2013,
  • [49] Modeling Dynamic Partial Reconfiguration in the Dataflow Paradigm
    Piat, Jonathan
    Crenne, Jeremie
    PROCEEDINGS OF THE 2014 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS 2014), 2014, : 298 - 303
  • [50] A Design Flow for FPGA Partial Dynamic Reconfiguration
    Xie Di
    Shi Fazhuang
    Deng Zhantao
    He Wei
    PROCEEDINGS OF THE 2012 SECOND INTERNATIONAL CONFERENCE ON INSTRUMENTATION & MEASUREMENT, COMPUTER, COMMUNICATION AND CONTROL (IMCCC 2012), 2012, : 119 - 123