CMOS low dropout linear regulator with single Miller capacitor

被引：15
|
作者：
Huang, WJ [1 ]
Lu, SH
Liu, SI
机构：
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan
[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
来源：
ELECTRONICS LETTERS | 2006年 / 42卷 / 04期
关键词：
D O I：
10.1049/el:20064062
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 2-5 V 150 mA CMOS low dropout (LDO) linear regulator with a single Miller capacitor of 4 pF is presented. The proposed LDO regulator with a bandgap voltage reference has been fabricated in a 0.35 mu m CMOS process and the active chip area is 485 x 586 mu m. The maximum output current is 150 mA and the regulated output voltage is 1.8 V.
引用
收藏
页码：216 / 217
页数：2
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