A Spread Spectrum Clock Generator Using Digital Modulation Scheme

This paper describes a new architecture of the spread-spectrum clock generator (SSCG) using direct digital modulation scheme on VCO. Differing from the conventional technique by altering the control voltage of VCO, the modulating operation is performed by the selection of multi-band VCO. The proposed SSCG test chip has been fabricated by CMOS 0.18 mu m 1P6M process. The operating frequency range is within 680 similar to 1,080MHz with the center-spread setting of 0.5% and 1%. The chip area is 0.68mm(2). The peak reduction at 800MHz output clock can achieve 10.61dB and 12.52dB for ratios of 0.5% and 1%, respectively. The power consumption is 12mW at 800MHz.