An Output-Capacitorless Adaptively Biased Low-Dropout Regulator With Maximum 132-MHz UGF and Without Minimum Loading Requirement

This paper presents an output-capacitorless adaptively biased (AB) low-dropout regulator (LDO) with stable behavior in 0-25 mA load range. The enhanced multipath nested Miller compensation (EMNMC) with embedded feedforward path and &reduction compensation technique are proposed, to achieve high loop gain and wide bandwidth. A symmetrically matched current-voltage mirror (SMCVM) is applied to implement the AB scheme, enabling accurate load current sensing and robust operation of the LDO during full load range. The proposed LDO has been designed in a 0.13-mu m CMOS technology. Simulation results verify that the proposed LDO works stably under 0 similar to 25 mA loading current and 0 similar to 50 pF loading capacitance. It has a maximum current efficiency of 99.17% and a maximum unity-gain frequency (UGF) of 132 MHz. The extension of UGF also magnificently contributes to improvement of power-supply rejection (PSR).