PD-SOI Fnabling Adaptive RF Front-End Modules

被引：0
|
作者：
van Liempd, Barend [1 ]
Craninckx, Jan [1 ]
Wambacq, Piet [1 ,2 ]
机构：
[1] IMEC, Leuven, Belgium
[2] Vrije Univ Brussel, ETRO Dept, Brussels, Belgium
来源：
2018 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2018年
关键词：
RF; partially depleted; PD; SOI; electrical-balance duplexers; high power handling; switched capacitor banks; ELECTRICAL-BALANCE DUPLEXER;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Partially depleted silicon-on-insulator (PD-SOI) is a key enabling technology for adaptively tuned RF front-end modules (FEM). Unlike bulk CMOS, thanks to SOI's insulating buried-oxide (BOX) layer, switched capacitor banks can allow for large voltage swing and exhibit a high small-signal linearity. This in turn enables LTE standard-proof power and linearity capabilities for tunable duplexers based on electrical-balance duplexers (EBDs) and N-path filters. These building blocks help to reduce the amount of SAW filters typically required in LTE handsets and enable in-band full-duplex (IBFD). This paper presents an overview of work related to tunable FEM in 180nm PD-SOI technology.
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页数：2
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